HP 16501A LOGIC Uživatelský manuál stáhnout pdf (Strana 33)

To examine software execution when a timing

violation occurs

The timing analyzer triggers when the timing violation occurs, and when it

triggers, it also sets its “arm” level to true. When the state analyzer receives

the arm signal, it triggers immediately on the present state.

Select the timing analyzer Trigger menu.

2 Define the Edge1 term to represent the control line where the timing

violation occurs.

3 Under Timing Sequence Levels, enter the following sequence

specification:

TRIGGER on “glitch/edge1” 1 time

Select the state analyzer Trigger menu and accept the default

(anystate) definition for term a.

5 Under State Sequence Levels, enter the following sequence

specification:

•

While storing “anystate” TRIGGER on “arm • a” 1 time

•

Store “anystate”

Triggering

To examine software execution when a timing violation occurs

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HP 16501A LOGIC Uživatelský manuál Strana 33